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preliminary TT1628 / tt1668 2014/9/10 page j 1/14 ver. j 2.3 led driver with key scan function
preliminary TT1628 / tt1668 2014/9/10 page j 2/14 ver. j 2.3 . general description TT1628(sop 28) / tt1668(sop 24) is an led controller driver with key scan function . ten segment output lines, four grid output lines, thr ee segment/grid output lines , display memory, pulse width control circuit , key scan circuit , 3 wire interface circuit are all incorporated into a single chip to build a highly reliable periphe ral device for a single chip microcomputer. features ? multiple display modes (10 segment x 7 grid to 13 segment x 4 grid) ? key scanning (10 x 2 ) ? 8 step dimming adjustment ? build-in rc oscillator ? serial interface for clock, data input/ out put, strobe pins ? sop28 package (TT1628) / s op24 package(tt1668) ? cmos technology ? low power consumption .pin assignment TT1628 tt1668
preliminary TT1628 / tt1668 2014/9/10 page j 3/14 ver. j 2.3 . pin description pin?name? i/o? pin?description dio? i/o? data?input?pin?:?this?pin?inputs?serial?data?at?the?rising?edge ?of?the?shift?clock? (starting?from?the?lower?bit)? data?output?pin?(n\channel,?open\drain)? cl k ?i? clock?input?pin?this pin?reads?serial?data?at?the?rising?edge?an d?outputs?data?at? the?falling?edge.? stb? i? serial?interface?strobe?pin the?data?input?after?the?stb?has ?fallen?is?processed?as?a?comma nd.?when?this? pin?is?high",?clk?is?ignored.? k1?~?k2? ? ? key?data?input?pins the?data?sent?to?these?pins?are? latched?at?the?end?of?the?displ ay? cycle.?(internal?pull\low?resistor)? vdd? p? power?suppl y seg1/ks1?~? seg10/ks10? o? segment?output?pins?(p\channel,?open?drain) also?acts?as?the?key?source? seg12/gr7?~? seg14/gr5? ? segment?/?grid?output?pins ? gnd? p? ground?pin? gr4?~?gr1? o? grid?output?pins equivalent circuits for inputs and outputs
preliminary TT1628 / tt1668 2014/9/10 page j 4/14 ver. j 2.3 . block diagram
preliminary TT1628 / tt1668 2014/9/10 page j 5/14 ver. j 2.3 function description commands a command is the first byte (b0 to b7) inputted to tt 1628/tt1668 via the dio pin after stb pin has changed from high to low state. if for some reason the stb pin is se t to high while data or commands are being transmitted, the serial communication is initialized, and the data/ commands being transmitted are considered invalid. b7 b6 commands 0 0 display mode setting commands 0 1 data setting commands 1 0 display control commands 1 1 address setting commands 1: display mode setting commands TT1628/tt1668 provides four display mode settings as shown in the diagram below: as stated earlier a command is the first one byte (b0 to b7) transmitted to TT1628/tt1668 vi a the dio pin when stb is low. however, for these commands, the bit 3 to bit 6 (b2 to b5) are ignored, bit 7 & bit 8 (b6 to b7) are given a value of 0. the display mode setting commands determine the number of segments and grid s to be used (10 to 13 segments, 7 to 4 grids). a display commands on must be executed in order to resume display. if the same mode setting is selected, no command execution is take place, therefore, nothing happens. when power is turned on, the 7-grid, 10-segment modes is selected. msb lsb b7 b6 b5 b4 b3 b2 b1 b0 display mode 0 0 -- -- -- -- 0 0 4 digits, 13 segments 0 0 -- -- -- -- 0 1 5 digits, 12 segments 0 0 -- -- -- -- 1 0 6 digits, 11 segments 0 0 -- -- -- -- 1 1 7 digits, 10 segments 2: data setting commands the data setting commands executes the data write or data read modes for TT1628/tt1668. the data setting command, the bits 5 and 6 (b4, b5) are ignored, bit 7 (b6) is given the value of 1 while bit 8 (b7) is given the value of 0. please refer to the diagram below. when power is turned on, bit 4 to bit 1 (b3 to b0) are given the value of 0. msb lsb 0 1 - - b3 b2 b1 b0 b1:b0 : data write & read mode settings: 0 0 : write data to display mode 1 0 : read key data b2 : data write & read mode settings: 0 : increment address after data has been written 1 : fixed address b3 : mode settings: 0 : normal operation mode 1 : test mode
preliminary TT1628 / tt1668 2014/9/10 page j 6/14 ver. j 2.3 TT1628/tt1668 key matrix & key input data storage ram TT1628/tt1668 key matrix consists of 10 x 2 array as shown below: each data entered by each key is stored as follows and re ad by a read command, starting from the last significant bit. when the most significant bit of the data (b7) has been re ad, the least significant bit of the next data (b0) is read. k1~~~~~~~~~~~~~~k2 k1~~~~~~~~~~~~~~~k2 seg1/ks1 seg2 / ks2 x seg3/ks3 seg4 / ks4 x seg5/ks5 seg6 / ks6 x seg7/ks7 seg8 / ks8 x seg9/ks9 seg10 / ks10 x b0~~~~~~~~~~~~~~b1 b3~~~~~~~~~~~~~~~~b4 b6~~~~~~~~~~~~~~~b7 3: address setting commands address setting commands are used to set the address of t he display memory. the address is considered valid if it has a value of 00 h to 0d h . if the address is set to 0e h or higher, the data is ignored until a valid address is set. when power is turned on, the address is set at 00 h . please refer to the diagram below. msb lsb 1 1 - - b3 b2 b1 b0 b3:b0 : address: 00 h to 0d h seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 x seg12 seg13 seg14 x x b0 b1 b2 b3 b4 b5 b6 b7 00 h dig1 b0 b1 b2 b3 b4 b5 b6 b7 01 h b0 b1 b2 b3 b4 b5 b6 b7 02 h dig2 b0 b1 b2 b3 b4 b5 b6 b7 03 h b0 b1 b2 b3 b4 b5 b6 b7 04 h dig3 b0 b1 b2 b3 b4 b5 b6 b7 05 h b0 b1 b2 b3 b4 b5 b6 b7 06 h dig4 b0 b1 b2 b3 b4 b5 b6 b7 07 h b0 b1 b2 b3 b4 b5 b6 b7 08 h dig5 b0 b1 b2 b3 b4 b5 b6 b7 09 h b0 b1 b2 b3 b4 b5 b6 b7 0a h dig6 b0 b1 b2 b3 b4 b5 b6 b7 0b h b0 b1 b2 b3 b4 b5 b6 b7 0c h dig7 b0 b1 b2 b3 b4 b5 b6 b7 0d h
preliminary TT1628 / tt1668 2014/9/10 page j 7/14 ver. j 2.3 4: display control commands the display control commands are used to turn on or off a display. it also used to set the pulse width. please refer to the diagram below. when the power is turned on, a 1/16 pulse width is selected and the displayed is turned off (the key scanning is started). msb lsb 1 0 - - b3 b2 b1 b0 b2~b0 : dimming quantity settings: 000: pulse width=1/16 001: pulse width=2/16 010: pulse width=4/16 011: pulse width=10/16 100: pulse width=11/16 101: pulse width=12/16 110: pulse width=13/16 111: pulse width=14/16 b3: display settings: 0: display off (key scan continues) 1: display on
preliminary TT1628 / tt1668 2014/9/10 page j 8/14 ver. j 2.3 serial communication format the following diagram shows the TT1628/tt1668 serial communication format. the dio pin is an n-channel, open-drain output pin; therefore, it is highly recommended that an external pull-up resistor (1k ? to 10k ? ) must be connected to dio. reception (data/command write) transmission (data read) where: t wait (waiting time) 1s it must be noted that when the dat a is read, the waiting time (t wait ) between the rise of the eighth clock that has set the command and the falling of the first clock that has read the data is greater or equal to 1s.
preliminary TT1628 / tt1668 2014/9/10 page j 9/14 ver. j 2.3 applications display memory is updated by incrementing add resses. please refer to the following diagram. where: command 1: display mode setting command command 2: data setting command command 3: address setting command data 1 to n: transfer display data (14 bytes max.) command 4: display control command the following diagram shows the waveforms when updating specific addresses. where: command 2: data setting command command 3: address setting command data: data display data
preliminary TT1628 / tt1668 2014/9/10 page j 10/14 ver. j 2.3 1. command 1: display mode commands 2. command 2: data setting commands 3. command 3: address setting commands 4. command 4: display control commands 5. when ic power is applied for the first time, the content of the display ram is not defined; thus, it is strongly suggested that the contents of the display ram be cleared during the initial setting.
preliminary TT1628 / tt1668 2014/9/10 page j 11/14 ver. j 2.3 application circuit j (common cathode type)
preliminary TT1628 / tt1668 2014/9/10 page j 12/14 ver. j 2.3 . absolutely maximum rating ( unless otherwise stated, ta=25
, gnd=0v) characteristics symbol rating unit supply voltage v dd -0.5~7.0 v input voltage v in -0.5~v dd + 0.5 v led seg. output current i o1 -50 ma led grid. output current i o2 200 ma maximum driver output current/total i total 400 ma operating temperature t o pr -40~+85 c storage temperature t st g -65~+150 c . dc electrical characteristics (unless otherwise stated, vdd=5v, gnd=0v, ta=25
) characteristics symbol conditions min typ max unit supply voltage v dd 4.5 5 5.5 v operating current i dd led off , no load 100 200 ua input high voltage v ih 0.7vdd vdd v input low voltage v il 0 0.3vdd v output high current i ohseg1 vo=vdd-2v seg1/ks1 to seg10/ks10, seg12/gr7 to seg14/gr5 -20 -25 -40 ma i ohseg2 vo=vdd-3v seg1/ks1 to seg10/ks10, seg12/gr7 to seg14/gr5 -25 -30 -50 output low current i olgr vo=0.3v gr1 to gr4 seg14/gr5 to seg12/gr7 100 140 ma output low current i olio vo=0.4v , dio 4 ma segment out high current tolerance i tolsg vo=v dd -3v(v dd =5v) vo=v dd -2v(v dd =3v) seg1/ks1 to seg10/ks10, seg12/gr7 to seg14/gr5 5 % k1 to k2 pull down resistor r l 40 100 k ? input high voltage v ih clk,dio,stb 0.7vdd vdd v input low voltage v il clk,dio,stb gnd 0.3 vdd v
preliminary TT1628 / tt1668 2014/9/10 page j 13/14 ver. j 2.3 . ac electrical characteristics characteristics symbol conditions min typ max unit oscillation frequency f osc 350 500 650 khz propagation delay time t plz clk dio cl=15pf , rl=10k ? 300 ns t pzl 100 output rising time t tzh1 seg1 j seg10 cl=300pf 2 us t tzh2 grid1 j grid4 seg12/grid7 j seg14/grid5 cl=300pf 0.5 output falling time t thz cl = 300pf segn gridn 120 us clock frequency f max duty=50% 1 mhz input capacitor c i 15 pf clock pulse width pw cl k 400 ns strobe pulse width pw stb 1 us data setup time t setup ns data hold time t hold ns clk stb t cl k -stb clk stb 1 us wait time t wait clk clk 1 us timing diagram
preliminary TT1628 / tt1668 2014/9/10 page j 14/14 ver. j 2.3 . package information

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